AMD introduces third-gen Epyc Milan-X server CPUs with up to 768MB of L3 cache

guest · Nov 8, 2021

AMD introduces third-gen Epyc Milan-X server CPUs with up to 768MB of L3 cache
AMD's Milan-X CPUs are drop-in compatible with a BIOS update
November 8, 2021
https://www.techspot.com/news/92132-amd-introduces-third-gen-epyc-milan-x-server.html

In a nutshell: Codenamed Milan-X, these new chips will feature the same capabilities and features as existing third-gen Epyc processors, albeit with three times the amount of L3 cache. At the top tier, this works out to 768MB of L3 cache and up to 804MB of total cache per socket.

AMD at Computex earlier this year teased next-gen 3D chiplet technology it developed in collaboration with Taiwan Semiconductor Manufacturing Company. During the company’s virtual Accelerated Data Center Premiere event on Monday, AMD announced it would be bringing this new technology to the data center.
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Su said Milan-X chips are the fastest server processors for technical computing workloads, offering more than a 50 percent uplift compared to standard Milan processors.

Third-gen AMD Epyc CPUs with 3D V-Cache are scheduled to launch in the first quarter of 2022. Cisco, Dell, Lenovo, HPE and Supermicro have already partnered with AMD and will be offering server solutions utilizing these processors when the time comes.
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If you can’t wait that long, Microsoft Azure HPC has virtual machines featuring the new chips available from today in private preview with a broader rollout slated for the coming weeks.
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AMD introduces third-gen Epyc Milan-X server CPUs with up to 768MB of L3 cache

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